Incr is the data increment and wrap is the address increment. These test try to randomize both the data and the * macro centralizes the memory test logic. * _incr and _wrap instead of registers which cause spilling. ![]() These are more common with the cache on, so you should simulate them with ldm/stm. You will need to use ldm/stm pairs to simulate a full SDRAM burst. With the cache off, you can use char, short, int, and long long pointers to test some different burst lengths. You might wish to find the others to constantly change rows, banks and device size bank size-1 for example however prime numbers will work better as you have different amounts of bits changing all the time. ![]() Just take numbers that are relative prime to the size of the SDRAM and use that as an increment. I have found that a pseudo random address/data test works well. A complete SDRAM test could take years to run on a single board. Bare metal framework (no cache, interrupts, DMA, etc.)Īnother limiting requirement is the time to run.The SSH involves encryption which is CPU/memory-intensive and the DMA engine often does different SDRAM cycles than the CPU (with cache). Personally, we had a system where 5% of the boards would show problems when doing an SSH transfer over Ethernet (DMA). There are single beat reads/write, bank-to-bank transfer, terminated bursts, etc. There are many different cycles with SDRAM. There are algorithms documented such as walking bits, etc. Here is one running under Linux - mturquette/memtest Most projects I have seen are C-based and can not test everything. As you cite MemTest86, I think I understand. ![]() ![]() It may mean different temperatures, voltages and across a range of devices with different component tolerances.
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